1. Field of the Invention
The present invention relates to a method of power IC inspection, more particularly, to a method applied to inspect whether electrically-failed power ICs results from photo resist peeling before or during source implantation.
2. Description of the Related Art
Vigorous developments of power ICs are now under way. First refer to FIG. 1 and FIG. 2, which represent the schematic cross-sectional diagram and top-view diagram of power ICs, respectively. The power IC is formed on a semiconductor substrate 10. The gate 12 of the power IC is formed in a deep trench by performing a series of conventional photolithography, anisotropic etching step, and chemical vapor deposition. The source 14 of the power IC 14 is formed by first coating a photo resist layer 16, defining the region of source 14 by photolithography process, and then ion-implanting N-impurities (for NMOS) or P-impurities (for PMOS) into the semiconductor substrate 10. The undoped region 18 between source and drain is not ion-implanted because the photo resist layer 16 serves as a hard mask during source implantation.
However, the photo resist layer 16 might peel during the photolithography process. As a result, the undoped region 18 is ion-implanted during source implantation because of no hard mask. As a result, the breakdown voltage of source 14 to drain 20 is too poor to well work.
In order to avoid from ion-implanting in error, it would be the best to inspect the photo resist layer 16 before or after source implantation. In the present semiconductor industry, only optical scanners of KLA-Tencor can inspect the pattern of the photo resist layer 16 automatically. However, the optical scanners of KLA-Tencor are with very low throughput. For this reason, only few semiconductor substrates can be sampled in the real application. As a result, some of electrically-failed power ICs resulted from photo resist peeling will be released from inspection until final electrical test.
There are lots of potential reasons resulting in the failure of the electrically-failed power ICs. In the present, there is no method which can verify whether the failure of the electrically-failed power ICs results from photo resist peeling. This issue embarrasses both of the QC (Quality Control) people and the process people.
The main purpose of the present invention is to provide a method of power IC inspection to inspect whether a electrically-failed portion of power ICs results from photo resist peeling during photolithography process during source implantation process.
The present invention provides a method of power IC inspection to inspect whether electrically-failed power ICs results from photo resist peeling during source implantation. First, the hot spots on the semiconductor substrate 10 are recovered by performing liquid crystal experiment. After that, each of the electrically-failed power ICs manufactured on the semiconductor substrate 10 is laser-marked according to the hot spots.
Thereafter, the metal layers on the power ICs are removed by the conventional etching process, and then the dielectric layers on the power ICs are also removed by the conventional etching process. Finally, the semiconductor substrate 10 is put into an acid solution containing chromium (Cr), so that a close contour is shown at each of the power ICs whose photo resist layer didn""t peel during photolithography process during source implantation process.
The acid solution containing chromium (Cr) is HNO3/HF/CrO3/H2O solution. The HNO3/HF/CrO3/H2O solution is prepared by first dissolving 50 grams of CrO3 solution into 400 ml of water, and then inputting 96% of 100 ml of CrO3 solution and 49% of 300 ml of HF into the water. According to one embodiment of the present invention, the semiconductor substrate 10 is input into the HNO3/HF/CrO3/H2O solution for 10 to 20 seconds. According to another embodiment of the present invention, the semiconductor substrate 10 is input into the HNO3/HF/CrO3/H2O solution for 15 seconds.